Search found 26 matches

by Pygmalion
Thu Feb 29, 2024 4:36 pm
Forum: Hardware
Topic: New open lower RAM module design (photoessay)
Replies: 98
Views: 3738

Re: New open lower RAM module design (photoessay)

As for the pure communication protocol, ULA and S80 are masters and RAM is a slave, so the problem with timings is unlikely. Unless ULA is doing something unusual. Unfortunately, knowledge of the ULA communication protocol seems to have been lost to history. So the hypothesis that the problem is due...
by Pygmalion
Wed Feb 28, 2024 11:41 am
Forum: Hardware
Topic: New open lower RAM module design (photoessay)
Replies: 98
Views: 3738

Re: New open lower RAM module design (photoessay)

Trying to eliminate them is a false economy. I've just finished a project at work, and when ordering the parts the 0.1uF capacitors were under a penny each even in small quantities. A 0603 size chip capacitor takes seconds to hand solder to the board too. Quite often PCB assembly houses don't even ...
by Pygmalion
Sat Feb 24, 2024 3:32 pm
Forum: Hardware
Topic: New open lower RAM module design (photoessay)
Replies: 98
Views: 3738

Re: New open lower RAM module design (photoessay)

So this thread seems to be at a dead end. I have finished repairing my ZX Spectrum and now have to decide whether to abandon this project and put it back in storage. I am sure it should be possible to develop the memory module with just a two-layer board. After all, the ZX Spectrum itself is built o...
by Pygmalion
Sun Nov 12, 2023 7:33 pm
Forum: Hardware
Topic: New open lower RAM module design (photoessay)
Replies: 98
Views: 3738

Re: New open lower RAM module design (photoessay)

No, that wouldn't make any sense. /CAS goes low when the second part of the address (the column address) is on the 7-bit address bus. The memory then has a certain amount of time to fetch the data byte and put it on the data bus. The 4116 timing diagram is this: https://i.ibb.co/4JPDWNx/Screenshot-...
by Pygmalion
Sun Nov 12, 2023 6:02 pm
Forum: Hardware
Topic: New open lower RAM module design (photoessay)
Replies: 98
Views: 3738

Re: New open lower RAM module design (photoessay)

The Z80 accesses this memory as normal, but the ULA handles the control lines for the Z80A. This detail might be extremely important. How does ULA handle Z80 control lines? Now the /CAS line is taken low. When this happens, DRAM should sample the address lines and then latch the address into its in...
by Pygmalion
Sun Nov 12, 2023 4:06 pm
Forum: Hardware
Topic: New open lower RAM module design (photoessay)
Replies: 98
Views: 3738

Re: New open lower RAM module design (photoessay)

i have posted some youtube videos (hopefully) to show the sparkles moving this was on the issue 2 with no delay at all, on the game loader screen there are was only one block of them when using delay Interesting videos. It is especially interesting that the sparkles appear only on the part of the s...
by Pygmalion
Sun Nov 12, 2023 1:45 pm
Forum: Hardware
Topic: New open lower RAM module design (photoessay)
Replies: 98
Views: 3738

Re: New open lower RAM module design (photoessay)

Yes, data are provided directly from/to Z80, but command lines go through ULA, and it is unclear how ULA converts MREQ RD and WR from Z80 to RAS CAS in WE for DRAM. Additional problem is that ULA processing those lines also makes some additional delay. What I am concerned is that those sparks can be...
by Pygmalion
Sun Nov 12, 2023 12:24 pm
Forum: Hardware
Topic: New open lower RAM module design (photoessay)
Replies: 98
Views: 3738

Re: New open lower RAM module design (photoessay)

1024MAK

ULA displays the picture, right? Does ULA read RAM all the time while displaying the picture?

If so, if there is problem with ULA reading, picture would NEVER be stable.
by Pygmalion
Sun Nov 12, 2023 10:48 am
Forum: Hardware
Topic: New open lower RAM module design (photoessay)
Replies: 98
Views: 3738

Re: New open lower RAM module design (photoessay)

i have been looking at the timing diagrams but i am learning as i go as i do with most things. so what i think is that the CAS delay requirement is more to do with the RAS going through the inverter and delaying it by a few ns and then the CAS goes active before the data is stable on the register l...
by Pygmalion
Sun Nov 12, 2023 10:25 am
Forum: Hardware
Topic: New open lower RAM module design (photoessay)
Replies: 98
Views: 3738

Re: New open lower RAM module design (photoessay)

OK, thanks for the answer. As much as I do not understand the difference between two-layer and four-layer design, I would want to understand the timing issue. Has anyone studied the specifications of 4116 DRAM and 32k SRAM? [I have some experience with reading specifications and bitbanging serial an...
by Pygmalion
Sat Nov 11, 2023 9:02 pm
Forum: Hardware
Topic: New open lower RAM module design (photoessay)
Replies: 98
Views: 3738

Re: New open lower RAM module design (photoessay)

So, do Retroleum and ZXzigg ram modules use four layers board?
by Pygmalion
Sat Nov 11, 2023 1:36 pm
Forum: Hardware
Topic: New open lower RAM module design (photoessay)
Replies: 98
Views: 3738

Re: New open lower RAM module design (photoessay)

The 4 layer design provides a ground plane and a power plane positioned in the centre layers so they separate the signals on the outer layers. That's best practise for high frequency circuits. The ground plane enables low impedance for returning signals, reduces crosstalk and interference, and redu...
by Pygmalion
Sat Nov 11, 2023 9:42 am
Forum: Hardware
Topic: New open lower RAM module design (photoessay)
Replies: 98
Views: 3738

Re: New open lower RAM module design (photoessay)

As I understand the problem, the main issue here is whether a particular ULA always reads the data at the same time in relation to CAS signal. If the answer is yes, then the delay circuit of dfzx that delays both the start and the end of the CAS signal is fine, and only the values of Csmall and R2 n...
by Pygmalion
Fri Nov 10, 2023 10:48 pm
Forum: Hardware
Topic: New open lower RAM module design (photoessay)
Replies: 98
Views: 3738

Re: New open lower RAM module design (photoessay)

What price point are you aiming for? You can't optimise away the $7 shipping, so the $2 fabrication cost is the only place to make savings. Re-routing a few tracks and removing a couple of vias isn't going to make any difference to the price. As I understand things, Mark's re-design has been tested...
by Pygmalion
Thu Nov 09, 2023 10:22 pm
Forum: Hardware
Topic: New open lower RAM module design (photoessay)
Replies: 98
Views: 3738

Re: New open lower RAM module design (photoessay)

I have recreated mark8bit's two-layer project in KiCAD. The project could be simplified even further if the paths were routed between the pins, but I was afraid that rerouting would change the galvanic properties and cause more problems with signal delays. I only rerouted RAS_INV path as mark8bit's ...
by Pygmalion
Mon Oct 30, 2023 9:08 pm
Forum: Hardware
Topic: New open lower RAM module design (photoessay)
Replies: 98
Views: 3738

Re: New open lower RAM module design (photoessay)

The issue that's popped up here is that mark8bit has redesigned the layout of the board, but as I understand it hasn't yet done the empirical testing of the delay circuit. He's made some significant changes, including removing the internal layers which carry my power and ground planes, and so has c...
by Pygmalion
Mon Oct 30, 2023 8:05 pm
Forum: Hardware
Topic: New open lower RAM module design (photoessay)
Replies: 98
Views: 3738

Re: New open lower RAM module design (photoessay)

As far as I understand, the delay depends on the values of the capacitor C4 and the resistor R1. Does this mean that these two values have to be adjusted for each different ZX Spectrum or rather each different ULA chip?

My ULA is 6C001E.

Image
by Pygmalion
Sun Oct 29, 2023 9:28 pm
Forum: Hardware
Topic: New open lower RAM module design (photoessay)
Replies: 98
Views: 3738

Re: New open lower RAM module design (photoessay)

i am no further forward with the testing. but i have spent the time to learn how to post my project on github so have put it there. https://github.com/marksummerton/zx-spectrum-lower-ram-module.git Great! Have you tried putting it in your ZX Spectrum to see if it works? As far as I can tell, the po...
by Pygmalion
Mon Oct 23, 2023 9:23 pm
Forum: Hardware
Topic: New open lower RAM module design (photoessay)
Replies: 98
Views: 3738

Re: New open lower RAM module design (photoessay)

I have repaired my ZX Spectrum by replacing the DRAM chips with those obtained at AliExpress. :dance

I am therefore interested in making low memory adapter for future use. Please, if you can, share files for the board optimised for two layers as soon as it is tested. Thanks.
by Pygmalion
Sun Oct 15, 2023 8:30 pm
Forum: Hardware
Topic: New open lower RAM module design (photoessay)
Replies: 98
Views: 3738

Re: New open lower RAM module design (photoessay)

yeh i use JLPCB and its always the postage to the UK that hits the hardest, although there pricing is strange there per unit price tends to be cheaper for less quantity.. i always go for the absolute cheapest postage and it has always arrived (eventually) . The problem with the cheapest shipping is...
by Pygmalion
Sun Oct 15, 2023 12:37 pm
Forum: Hardware
Topic: New open lower RAM module design (photoessay)
Replies: 98
Views: 3738

Re: New open lower RAM module design (photoessay)

the link is from a different project, i think Derek did his from scratch, the need for CAS delay i think is the access speed of the Sram used, i suspect the other caps could be removed, i may try this tomorrow. with mine i mixed all the data / address lines up in order to make the shortest routes i...
by Pygmalion
Sun Oct 15, 2023 12:33 pm
Forum: Hardware
Topic: New open lower RAM module design (photoessay)
Replies: 98
Views: 3738

Re: New open lower RAM module design (photoessay)

From what I've seen, the 5V power supply inside the Spectrum is pretty stable, so you might get away with reduced decoupling, but as soon as you start adding devices on the back, or using replacement keyboards and the like, that is likely to change. This is memory, so one little sag on the supply r...
by Pygmalion
Sat Oct 14, 2023 10:39 pm
Forum: Hardware
Topic: New open lower RAM module design (photoessay)
Replies: 98
Views: 3738

Re: New open lower RAM module design (photoessay)

I also discovered this project and, while tinkering with the original KiCAD project, came to the conclusion that it could be simplified considerably: Reduce to two levels, reduce the number of vias, etc. I am glad that others have come to the same conclusion! Also, is it absolutely necessary to use ...
by Pygmalion
Tue Sep 19, 2023 2:48 pm
Forum: Hardware
Topic: Repairing ZX Spectrum issue two
Replies: 5
Views: 219

Re: Repairing ZX Spectrum issue two

1024MAK wrote: Tue Sep 19, 2023 1:48 pm The topic on Sinclair ZX World is here.

Yes, the Z80 does look to be running.

Mark
It might be better to continue here. On the other forum every post must be approved and it takes a lot of time...
by Pygmalion
Tue Sep 19, 2023 1:23 pm
Forum: Hardware
Topic: Repairing ZX Spectrum issue two
Replies: 5
Views: 219

Re: Repairing ZX Spectrum issue two

First, explain how you measured the voltages. What points did you measure across and what voltage, exactly, did you find at each point? Well, I checked the leftmost lower RAM chip as described in a YouTube video and there were +12V, +5V and -5V in the appropriate places What test equipment do you h...