Register Addressing Modes

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PeterJ
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Register Addressing Modes

Post by PeterJ » Sun Nov 26, 2017 4:16 pm

Hello,

I'm typing up a 'crib' sheet for my adventures with machine code. I'm just making sure I have my head around register addressing modes.

Is this a complete list of the more common load instructions (excluding the stack pointer & Index register instructions)? Also have I put everything in the right groups?

Thanks

Immediate Addressing
LD (HL),n
LD A,n
LD B,n
LD C,n
LD D,n
LD E,n
LD H,n
LD L,n

Register Addressing
LD r,r

Register Indirect Addressing
LD (ADDR),A
LD (BC),A
LD (DE),A
LD (HL),A
LD (HL),B
LD (HL),C
LD (HL),D
LD (HL),E
LD (HL),H
LD (HL),L
LD A,(ADDR)
LD A,(BC)
LD A,(DE)
LD A,(HL)
LD B,(HL)
LD C,(HL)
LD D,(HL)
LD E,(HL)
LD H,(HL)
LD L,(HL)

Extended Addressing
LD BC,(ADDR)
LD DE,(ADDR)
LD HL,(ADDR)
LD (ADDR),BC
LD (ADDR),DE
LD (ADDR),HE
LD BC,nn
LD DE,nn
LD HL,nn
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Ast A. Moore
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Re: Register Addressing Modes

Post by Ast A. Moore » Sun Nov 26, 2017 5:18 pm

PeterJ wrote:
Sun Nov 26, 2017 4:16 pm
Immediate Addressing
LD (HL),n
No, that’s Indirect addressing, I believe.
PeterJ wrote:
Sun Nov 26, 2017 4:16 pm
Extended Addressing
LD BC,nn
LD DE,nn
LD HL,nn
These three definitely belong to the Immediate Addressing group. The width of an instruction is irrelevant here. You’re still loading registers with values specified in the operand immediately.

LD (HL),n could possibly refer to Mixed Mode Addressing, though. The distinction is not very clear cut. In general, the Zilog documentation and, say, Rodnay Zaks don’t always agree on these definitions.
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1024MAK
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Re: Register Addressing Modes

Post by 1024MAK » Sun Nov 26, 2017 7:27 pm

To be fair, 6502 programming books make a big deal about addressing MODEs, but Z80 books, not so much. I think partly due to the different mnemonics that are used.

In summary, as with most things, there are as many "standards" as there are CPUs!
Have a read of the Wikipedia page!

Mark
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Einar Saukas
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Re: Register Addressing Modes

Post by Einar Saukas » Mon Nov 27, 2017 4:43 pm

You may find this useful:

https://www.ime.usp.br/~einar/z80table/
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Ralf
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Re: Register Addressing Modes

Post by Ralf » Mon Nov 27, 2017 8:13 pm

I don't quite understand why you are doing it ;) There are so many existing lists of Z80 instructions on Internet.

But if you want your list complete don't forget about undocumented instructions on halves of IX and IY aregisters.

LD IXH,N
LD IYL,N and so on
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PeterJ
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Re: Register Addressing Modes

Post by PeterJ » Mon Nov 27, 2017 8:29 pm

Ralf wrote:
Mon Nov 27, 2017 8:13 pm
I don't quite understand why you are doing it ;) There are so many existing lists of Z80 instructions on Internet.

But if you want your list complete don't forget about undocumented instructions on halves of IX and IY aregisters.

LD IXH,N
LD IYL,N and so on
Hi Ralf. I was just trying to get my head around addressing modes, and making sure everything was in the right section. Its just the way I learn stuff!
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utz
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Re: Register Addressing Modes

Post by utz » Mon Nov 27, 2017 9:01 pm

LD (ADDR),A/LD A,(ADDR) should be in "Extended Addressing" according to this nomenclature. I'd say the term "Memory Indirect" is more descriptive, though.
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Re: Register Addressing Modes

Post by AndyC » Mon Nov 27, 2017 11:46 pm

Memory Indirect would suggest a level of double indirection, in the same way that Register Indirect does. So if ADDR was 4000h and the value stored at 4000h was 8000h, the a memory indirect load would fetch the byte from 8000h. That's not something the Z80 supports. LD A, (ADDR) is just plain old indirect addressing (with the indirection stored immediately as part of the instruction).
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Re: Register Addressing Modes

Post by utz » Tue Nov 28, 2017 9:34 am

Ah yes, you're right of course. Please disregard my statement above.
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